| Microchip 16F84A Option Register | What links here? |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|
| R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 |
| RBPU | INTEDG | T0CS | T0SE | PSA | PS2 | PS1 | PS0 |
| Bit | Kind | Name | Description |
|---|---|---|---|
| bit 7 | RW-1 | RBPU | Port B Pull-up Enable Bit 0 = pull-ups are enabled 1 = pull-ups are disabled. |
| bit 6 | RW-1 | INTEDG | Interrupt Edge Select bit 0 = Interrupt on falling edge of RB0 / INT pin 1 = Interrupt on rising edge of RB0 / INT pin |
| bit 5 | RW-1 | T0CS | TMR0 Clock Source Select bit 0 = Internal instruction cycle clock (CLKOUT) 1 = Transition on RA4 / T0CK1 pin |
| bit 4 | RW-1 | T0SE | TMR0 Source Edge Select bit 0 = Interrupt on falling edge of RA4 / T0CKI pin 1 = Interrupt on rising edge of RA4 / T0CKI pin |
| bit 3 | RW-1 | PSA | Prescaler Assignment bit Prescale Assignment bit 0 = prescaler is assigne to the Timer0 module 1 = prescaler is assigned to the WDT |
| bit 2 | RW-1 | PS2 | Prescaler Rate Select Bits See below |
| bit 1 | RW-1 | PS1 | |
| bit 0 | RW-1 | PS0 |
| Bits | TMR0 Rate | WDT Rate |
|---|---|---|
| 000 | 1:2 | 1:1 |
| 001 | 1:4 | 1:2 |
| 010 | 1:8 | 1:4 |
| 011 | 1:16 | 1:8 |
| 100 | 1:32 | 1:16 |
| 101 | 1:64 | 1:32 |
| 110 | 1:128 | 1:64 |
| 111 | 1:256 | 1:128 |
| filename: | microprocessors - microchip 16F84A - option register |
| filename: | microprocessors%20%2D%20microchip%2016F84A%20%2D%20option%20register |
| last edit: | June 02 2011 21:36:08 (4721 days ago) |
| ct | = 1714971438.000000 = May 06 2024 00:57:18 |
| ft | = 1307064968.000000 = June 02 2011 21:36:08 |
| dt | = 407906470.000000 |